Date & Time
Thursday, May 20, 2021 - 14:00
Location
Online
Seminars
OmniX - an OS architecture for omni-programmable systems
Mark Silberstein, Technion – Israel Institute of Technology
Abstract
Future systems will be omni-programmable: alongside CPUs, GPUs,
Security accelerators and FPGAs, they will execute user code
near-storage, near-network, and near-memory. Ironically, while
breaking power and memory walls via hardware specialization and near
data processing, emerging programmability wall will become a key
impediment for materializing the promised performance and power
efficiency benefits of omni-programmable systems. I argue that the
root cause of the programming complexity lies in todays CPU-centric
operating system (OS) design which is no longer appropriate for
omni-programmable systems.
In this talk I will summarize the results of the last seven years of research and a handful of publications on an accelerator-centric OS architecture called OmniX. OmniX advocates for extending standard OS abstractions into accelerators, while maintaining a coherent view of the system among all the resident processors. In OmniX, near-data and compute accelerators may directly invoke tasks and access I/O services, excluding the CPU from performance-critical data and control plane operations. The CPU becomes a "yet another" accelerator for sequential computations. I will show how OmniX design principles have been successfully applied to GPUs, Programmable NICs, and Intel SGX, and discuss the obstacles and successes of adopting some of them in industry.
Please email for a Zoom link
In this talk I will summarize the results of the last seven years of research and a handful of publications on an accelerator-centric OS architecture called OmniX. OmniX advocates for extending standard OS abstractions into accelerators, while maintaining a coherent view of the system among all the resident processors. In OmniX, near-data and compute accelerators may directly invoke tasks and access I/O services, excluding the CPU from performance-critical data and control plane operations. The CPU becomes a "yet another" accelerator for sequential computations. I will show how OmniX design principles have been successfully applied to GPUs, Programmable NICs, and Intel SGX, and discuss the obstacles and successes of adopting some of them in industry.
Please email for a Zoom link
About the speaker
Mark Silberstein is an Associate Professor at the EE department at the Technion - Israel Institute of Technology where he is heading the
Accelerated Computing Systems Lab:https://acsl.group
His research is centered around OSes for compute and I/O accelerator architectures. He is also working on practical ways to protect systems from speculative and non-speculative side channels attacks, showing some new attacks (Foreshadow) but also providing efficient ways to detect existing vulnerabilities (SpecFuzz, USENIX Sec'20). His recent new passion is using neural nets as a "computational" cache, where his student demonstrated the first application of NNs to data-path packet classification (NuevoMatch, SIGCOMM'20). Mark is actively looking for excellent postdocs.
His research is centered around OSes for compute and I/O accelerator architectures. He is also working on practical ways to protect systems from speculative and non-speculative side channels attacks, showing some new attacks (Foreshadow) but also providing efficient ways to detect existing vulnerabilities (SpecFuzz, USENIX Sec'20). His recent new passion is using neural nets as a "computational" cache, where his student demonstrated the first application of NNs to data-path packet classification (NuevoMatch, SIGCOMM'20). Mark is actively looking for excellent postdocs.